1. Field of the Invention
The present invention relates to a clock generating device and related synchronization method, and more particularly, to a clock generating device capable of being realized by both hardware and software and related synchronization method.
2. Description of the Prior Art
In electronic systems, the clock offsets generally exist between the signal transmitting end and the signal receiving end. Thus, when the circuits in the electronic system transmit signal, the electronic system needs to synchronize the clock signal of each circuit, to allow the electronic system to work normally.
Generally, the conventional electronic system often uses the phase-locked loop (PLL) realized by hardware to synchronize the clock signals. However, the PLL realized by the hardware needs to consume significant time on performing the synchronization process, resulting in that the clock signal cannot be synchronized in a short time. In addition, the PLL realized by the hardware also cannot control the time of synchronizing the clock signal according to different operation states of the electronic system. As can be seen from the above, the prior art needs to be improved.